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The Success Story Of

Mr. Vijayaprabhuvel Rajavel

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Mr. Vijayaprabhuvel Rajavel

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Mr. Vijayaprabhuvel Rajavel – Driving Innovation in Semiconductor Design & Test

Mr. Vijayaprabhuvel Rajavel is a trailblazer in the field of ASIC Product Engineering and Design for Testability (DFT) of Semiconductor Integrated Circuits. With a Master’s degree in Electrical and Computer Engineering from Portland State University and a Bachelor’s in Electronics and Communication Engineering from Anna University, graduating in the First Class, his expertise spans scan compression, ATPG, memory testing, and VLSI DFT methodology development.

His career is marked by significant contributions to leading EDA companies like Cadence Design Systems, where he served as a Lead Product Engineer. He played a pivotal role in optimizing DFT flows for key customers, resolving critical technical challenges, and ensuring timely product releases. His expertise extended across the USA, EMEA, and APAC regions, leading to substantial improvements in scan chains for a Graphics project (4% to 96%). Additionally, he resolved complex issues in advanced scan stitching – physical and power-aware, IEEE 1500 wrapper implementation, and power domain violations debugging. His strategic product evaluations facilitated new customer acquisitions, driving recurring revenue and these efforts were acknowledged through “Creator”, “Explorer”, and “Elevate the Team” recognitions.

At Samsung Austin R&D Center, he earned the “Award of Excellence” for developing an ATPG flow that enabled early detection of design issues, saving significant time in the chip integration lifecycle. His innovative approach to DFT methodologies has consistently improved chip yield, reduced test time and cost, and enhanced overall product quality.

Beyond his professional achievements, he is passionate about education and mentorship. He has taught graduate students at Portland State University, mentored aspiring engineers, and also founded exploredft.com, a resource for DFT Engineers. As a Senior Member of IEEE, he actively contributes through conference engagements, journal peer reviewing, and serving as Session Chair and Technical Program Committee, reflecting his commitment to advancing semiconductor engineering.

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